1. Field of the Invention
The present invention relates to the wiring of an semiconductor integrated circuit and a method thereof, and particularly to the wirings of a double-layered wiring construction of semiconductor integrated circuit, and to a method thereof.
2. Description of the Prior Art
Conventionally, semiconductor integrated circuits have many logic function blocks each made of a plurality of transistors and the like. In order to provide mutual metallic-wirings or conductive connections among the logic function blocks, double-layered wiring constructions are provided in such semiconductor integrated circuits. In the double-layered wiring construction, there are provided first level metallic-wirings and second level metallic-wirings. The first level metallic-wirings of the doouble-layered construction are lower layers formed adjacent to the semiconductor substrate. The second level metallic-wirings of the double-layered construction are upper layers separated through insulating layers formed on the first level metallic-wirings. Further, there are provided horizontal metallic wiring tracks and vertical metallic wiring tracks for assisting in forming the mutual connections among the logic function blocks using first and second level wirings.
With the above arrangement, for example, a connection or wiring between function blocks in a horizontal direction is effected using a first level metallic-wiring while a connection or wiring between function blocks in a vertical direction is effected using a second level metallic-wiring.
Thus, according to conventional connection or wiring techniques as employed in semiconductor integrated circuits, the first and second level metallic-wirings of the double-layer wiring construction are respectively employed as horizontal and vetical wiring paths, their deposition being aided by the horizontal and vertical metallic tracks.
Accordingly, the connections or wirings between function blocks have been provided by a combination or first and second level wirings. Further, if a connection among three or more function blocks or a connection between two function blocks having an intervening function block therebetween is required using the same level metallic-wiring as that which is employed in the internal metallic-wiring of the function block to be connected, the same level metallic wiring is not able to pass through the internal metallic-wiring disposed in the function block to be connected. In such instances, it is necessary to dispose an extra wiring region such as a horizontal or vertical metallic track, out of that function block areas, and to route the extra wiring region into the function blocks to be connected.
As is clear from the above description, conventional wirings of the double-layered wiring construction disadvantageously complicate wiring arrangement and increase semiconductor chip area.